Glad yo see you are trying your hand at PCB layout. You are asking a very reasonable question. Being a relative newbie at this (only 4 years) I can remember having some of these questions:
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Pick a simple package. In your post, it looks like you are using a Ball Grid Array package. This is not the easiest way to start. Sometimes, you can find a SOIC or TSSOP package for your chip which will be easier to solder and troubleshoot.
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By PCB standards, 20 mils is a huge trace which I might use for power distribution across an entire board. For a BGA package like this, you are likely not driving much current so a much smaller trace will be fine and easier to route.
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The company which will manufacture your boards should give you design rules even in electronic format to help you understand their minimum trace width and clearance standards and check your design against them before you send the board for production. I use OSHPark and you can find there rules for (looks like you are using EAGLE) here: http://docs.oshpark.com/design-tools/eagle/design-rules-files/
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The trace width is primarily about the amount of current you can pass without loss and excess heating. If you were looking to put a significant current through a trace, you should use one of the many trace width calculators on the web such as this one: http://docs.oshpark.com/design-tools/eagle/design-rules-files/
I use OSHPark’s prototype service which is 2 layers (traces are not inside the FR4) and 1 oz copper. Using this example, a 20mil trace could carry 750mA with only a 20F Temp rise over 70F ambient temp over a 1 inch trace. Your package will likely only generate 1/100 that current so a much thinner trace will be fine.
Good luck in your efforts, I hope this was helpful.
Chip