I’m trying to connect a number of daisy-chained shift registers via SPI and would like to know what distances people managed to bridge at what clock speed. The Core and the first shift register are probably 2 metres away from each other. The higher the transmission speed the better for my application.
Has anyone tried this before?
There is a RC effect in play here due to the resistance and capacitance inherent in the wire, and the longer the wire, the worse this is. This if course affects all signals more or less evenly (SCLK, MOSI, MISO) so the shift registers should still get the MOSI and SCLk data in sync, even though they have been delayed. The problem comes with SCLK and MISO, as MISO has the delay back again to the spark core in addition, whereas the SLCK the spark is using to clock the data in is not delayed at all. So there is a real potential with a long cable that the MISO data will arrive too late.
If the shift registers are output only then you should have no problem. Otherwise, I recommend hooking up an oscilloscope and see how the MISO/SCLK timing is at various clock speeds.
@sven, at 2M and a high SCLK frequency, your wires act like transmission lines and as @pra pointed out, affect the rise time of the signals. You may want to look at this article for some insight:
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Here’s another paper on the topic: Extending the SPI bus for
long-distance communication. With the TFT display I’m currently using I have about 3 inches of PCB trace and 6 inch jumper cables and at 40 MHz I have no problems. However, the TFT display has no “read” capability, so the MISO/SCLK problem is not an issue. I’m running a TI CC3200 Launchpad not a Spark Core. The max SPI clock speed on the core is 18 MHz.
Thanks for the responses @pra and @peekay123. The MISO signal doesn’t need to be read back into the Core, so any phase shift between MISO and SCLK is negligible.
However, after reading all this I’d like to play it safe and use LVDS. Has anyone had experience with any driver? I’d need a chip (DIL preferably) with 2 drivers (for MOSI and SCLK). Also, would I need a driver to interface each shift register or is it sufficient to use them to bridge the long distance only?
Core |====differential signal====| SR1 |-----| SR2 |---- … —|
or
Core |=====================| SR1 |===| SR2 |=== … ===|
If it was me, I’d just try it with SPI directly before I went to trying to use LVDS. At 2 metres I think you will be able to run 18 MHz (the spark max) and it will work OK. If it doesn’t, try putting 47 ohm termination resistors in series at the end of each wire in the cable (core side preferably). Polulo sell an I2C differential extender (part #2159). Take a look at that for an idea of the complexity of trying to do a differential adaptation. As their data sheet explains you need to do both ends and possibly will need to use level shifters as well (which may force a reduction in clock speed anyway).
It shouldn’t take much to breadboard out your design as it is, and find out whether it will work with standard SPI or not.
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Ok. I follow your advice and try it out on a breadboard first. I don’t think I need 18 MHz (I should be fine with 2MHz). Do I need to be careful with the type of cables I’m using (shielded? twisted?).
For now you can use regular hookup wire, or an old USB cable that is long enough with its ends cut off would be a good choice, I’d recommend cutting a 75 millimeter female jumper in half and soldering each to the cable for connection to the spark, This is a good place to add the termination resistors if you want. At the breadboard end you can do the same with a male jumper, or terminate it the way you want to connect to the PCS (I assume a 4 x female connector) and use male jumpers to connect from the connector to the breadboard.
I’m interested in learning how it goes!
I’ll have to do some shopping before I can try it out, but keep you posted.
Thanks again for all the great comments!