G’day Boffins,
I’m selecting an external watchdog and I’ve got a question about the good ol’ reset pin.
How long does the reset pin need to be HIGH for a reset to occur?
Some watchdogs i’m looking at pulse for 100ms, some 1ms.
Also, any ideas about how I get around the the watchdog output pin driving high for healthy and low for reset when the reset pin is the opposite?
Apologies if this has been answered elsewhere, it’s a hard one to search as ‘reset pin’ comes up errywhere.
thank you 
Derrr, use a pull up resistor. Ok I must need another coffee.
I’m still wondering about the period the reset pin needs to be HIGH for.
What device needs a HIGH level to reset?
And here you should find the actual figures you are looking for
https://github.com/spark/photon/blob/master/datasheets/STM32F205RGY6.pdf
Oh thanks so much Scruff, the 1ms one will be fine then.
Looks like I was arse-about on the HIGH level too. I’ve had a bad run of missing info in data sheets this week.
Thanks for taking up the slack on this one.
