the specs state ETADCSAMPLETIME() min is:
ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
is this 1.5 cycles od the system clock? please give me the actual minimum sampling time.
thanks.
.
the specs state ETADCSAMPLETIME() min is:
ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
is this 1.5 cycles od the system clock? please give me the actual minimum sampling time.
thanks.
.
@hib actual sampling times from the STM32f205 data sheet.
Hope this satisfies your request.
full data sheet available http://www.st.com/web/en/resource/technical/document/datasheet/CD00237391.pdf
Thanks. I need 1 usec or less.
In that case your going to need a MUCH faster processor lol
@hib. Unfortunately, there’s no way you’ll get 1.5 cycles A/D sample time with the Particle firmware. See this thread: Interesting results from various ADC sample times
The findings discussed in that thread may be important to you. Due to the 10-sample average, etc. coded in the firmware, you won’t be getting the world’s fastest read speeds with analogread()
.
For 1 MSPS+ (small digital 'scope, huh?), you will likely need an external ADC. Keep in mind that with such short sample rates, you will have a very low input impedance, regardless of which way you go.
It is possible to get approximately 1MSPS out of the STM32, but you’ll have to install a local build environment, and dig down “to the bare metal” to utilize the STM32’s “dual/triple fast-interleaved” ADC mode coupled with the DMA module to get the values. Couldn’t be any easier .
Is this for the Core (STM32F103) or the Photon (STM32F205)? If you’re digging down to the bare metal, according to the datasheets, we find:
@Bdub…good catch. That was a doozy of an error for someone wanting fast sample times . Maybe I do need some more sleep…
You and me both