RF Antenna Question

I am assembling a design using the P0. I don’t have the option of placing the 2.4Ghz antenna along the edge of the PCB so I was wondering if anyone can provide guidance on what to do in that case. I understand there should not be any ground plane under and around the antenna, I plan on stitching the top and bottom planes together with via’s to reduce any conductance from the antenna area. I have the following questions -

  1. how much room should I give the antenna
  2. what parts are safe to place adjacent to the antenna ‘keep out’ zone (passives, accelerometers, light sensors?)
  3. one some designs I have seen a ground plane adjacent to the antenna, not sure what that is for but maybe someone can explain what it’s used for ?

Thanks, I’m not an RF engineer and could use some help finishing up my design.

Yes, I have same issues. I will be really appreciate if someone can offer help!

Hi @mtnscott and @Joshua, I designed the Photon PCB which uses the PØ module. My advice would be to copy the Photon’s RF layout exactly. It is not recommended to surround the antenna in ground plane completely. Here’s another link showing a surrounding ground plane not recommended. It should be free on 2-3 sides of the chip antenna. I hope you are using a 4-layer board with the same stack up as the Photon. I don’t think it will be easy to keep 50 ohm impedance on the RF feedline with a 2-layer PCB; save yourself the headache and go with 4-layers (Top Signal/GND/Power/Bot Signal)

The ground plane on 1 to 2 sides of the antenna affects the resonant frequency of the antenna. You want to follow the recommendations of the antenna MFG for these distances, and then have your design tuned for best performance.

If you have no choice in PØ placement and cannot keep the antenna free of ground plane completely surrounding it, you may want to stick with a u.FL connector and small external foil antenna that you could stick to the inside of your enclosure.

As a last resort, if you can’t use an external antenna and can’t avoid surrounding the antenna in ground plane, follow the antenna MFG’s ground plane spacing requirements and keep the plane as far away as possible on the sides that are supposed to be on the edge of the PCB. If you do end up with this configuration, you may be forced to require “pointing” the device toward the Wi-Fi AP to achieve best results because of the dramatic change in RF radiation pattern. Or you may suffer with a dramatic range limitation on the device.

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Thanks for guidance!

I actually have already designed a PCB with PØ module, we have removed the chip antenna and only used external antenna as showing on picture.

Do you have any idea on the layout of the u.FL connector or is there any guidance or special requirements on the PCB design of u.FL connector? Like u.FL connector must be located on the side of the PCB? Or PCB must go with 4-layers like the chip antenna?

The main thing to keep in mind with the u.FL connector is to ensure a 50 ohm impedance on your RF feedline, and keep it as short as possible. Also most u.FL connectors have a center conductor that sits flush on the PCB but is not normally soldered. It just still carries the RF signal so it shouldn’t be too close to GND, so ensure that the GND plane is removed under it on the top layer. I’d still recommend 4 layers with the u.FL connector since it helps you keep the RF trace width smaller. You also want to highlight your RF feedline for your board house and ask them to ensure 50 ohm impedance matching on it. The ground plane surrounding the RF feedline should be stitched down to the GND plane on layer 2 of your 4 layer board as well (it’s likely going to tie into GND on the bottom layer as well).

If I had to guess just by looking at your board, I’d say you only have 6/6 mils of trace/clearance on the RF trace? If so that’s less than half of what it should be for a 4 layer design (~13 mils trace with 7.5 mil clearance to GND depending on your board specs) and the requirements for 2 layer are even thicker traces with more clearance. Layer 2 is going to be GND, so it should also be about 7.5 mils away from the top layer.

Many Thanks! It is much helpful to improve my deign.

I still have one more question on the wifi signal testing? Is there any way to test how the signal improved? Is there other professional way besides WiFi.RSSI() and WiFi.ping().

Reviving the topic… I am looking at putting the uFL connector with a P0 SoC. I understand from the conversation that I am to match the 50 Ohm impedance of the uFL and antenna. I have looked at some online calculators (e.g. https://www.eeweb.com/tools/microstrip-impedance), and they all seem to ignore the LENGTH of the trace. Does the length matter? Or is the 50 Ohm impedance between the signal-ground?

Hi @pnaylor1982

Length does not matter for characteristic impedance. Think of it this way, you can buy 1000 ft. of 50 ohm cable or 3 in. of 50 ohm cable and the characteristic impedance does not change. The characteristic impedance is set by the geometry of the conductors and dielectric along with the dielectric constant of the material.

What does matter are the parameters of your board as shown in the microstrip calculator you linked to. You have direct control over trace width but indirect control over the dielectric thickness (typically 1/16" or 1/32") and the dielectric constant of the board material. For typical FR4 it is in the 4 to 4.7 range depending on the supplier’s exact material and the frequency, so you should ask your PCB supplier what the number or graph over frequency is. High dielectric constant materials are sometimes used in special applications but the cost would not be worth it here I think.

The reason to try to impedance match is to reduce loss. Every time you make the signal go through an impedance mismatch, some signal is lost to heating the dielectric. Even a 90 degree corner causes some impedance mismatch since the the corner has a “width” from inside corner to outside corner of sqrt(2)*trace width, so hence the advice for straight and short wiring.

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Aha… ok, so it’s CHARACTERISTIC impedance… impedance per length (?). Thank you for the clarification :wink: I know how to move forward now.

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