Particle B Series B523/B524 pinout SPI1 SOM First board and AN001 BASIC SOM Design mistake

I think the SOM First Board and AN001 - Basic SOM design Eagle files contain a mistake.

In the B523/B524 datasheet, the SPI1 bus is defined on these pins:

40 - D3 - P1.10, SPI1 MOSI (CTS)
42 - D2 - P1.02, SPI1 SCK (RTS)
66 - D4 - P0.12, SPI1 MISO (PWM0)

And this is also how the SD card is connected to the M.2 SOM EVAL Board V1.1. I assume that the SD card was tested and that this is the correct pinout.

In the SOM First Board and AN001 Eagle, the M.2 connector has a different naming of the pins. Pin 40 is defined as D2 and Pin 42 as D3. An easy mistake to make as this is the only two pins not increasing the D number when increasing the Pin number. I nearly switched SCK and MOSI of the SPI1 bus because of this.

Maybe somebody from Particle, could check if the datasheet is correct and the two designs contain a mistake? @rickkas7? It is really hard to find out from the Device OS software where the hardware pins are defined and even then you cannot be sure that the NRF52 pin is correctly stated or the pin number.

It gets even more confusing if you look at the Electron pinout, where D3 is MISO, D4 is SCK and D2 is MISO. It would have been even more logical to at least keep that part of the pinout the same, but that would only be nice and less confusing, not obligatory.

The source of truth for what nRF port pins are assigned which Device OS name is the pinmap file. For the b5som, this is it:

  • D2 is P1.02
  • D3 is P1.10

(Incidentally, this is different on the bsom, D3 is P1.01, but this is OK because the difference is isolated within the SoM itself and doesn’t affect the base board.)

From the SPI hal, you can find the mapping from pin name to SPI function:

  • D2 is SPI1 SCK
  • D3 is SPI1 MOSI
  • D4 is SPI1 MISO

From the B523/B524 schematic:

  • P1.02 is connected to the RTS net which is connected to M.2 pin 42
  • P1.10 is connected to the CTS net which is connected to M.2 pin 40

From that, indeed:

  • 42 = D2 = P1.02 = SPI1 SCK = RTS
  • 40 = D3 = P1.10 = SPI1 MOSI = CTS

It does appear that the connections for D2 and D3 are reversed on the M.2 device in Eagle in the first board example. I’ll have to take a second look later to be absolutely certain before fixing it.

Since the real SoM eval uses a different device/symbol/footprint with even more confusing pin names, and the SoM first board doesn’t use those pins, apparently no one noticed.

The different SPI functions on D2 - D4 are a known annoyance that can’t be fixed. The order is different between Gen 2 (Photon, P1, Electron) and Gen 3 (Argon, Boron, B Series SoM, Tracker SoM). The P2 uses the Gen 2 order.