I have search high and low but so far I have been unable to find a reference to the maximum amount of current that can be drawn out of the 3.3v & 3.3v* pins. The Vreg is specified at 500mA and the core uses <300mA so the remainder, 200mA, should be available at the pins. That is assuming that the design and layout has been done with these specifications in mind. Is it a valid assumption that I can draw 200mA ‘forever’ and not damage the device? I would hate to smoke the regulator because of a bad assumption.
The documentation mentions the power requirement as being less than 300mA. You indicated that it is more. How much more? What should I use as the maximum amount of current that can be provided on the 3.3v & 3.3v* pins? Is it capable of providing 175mA or 150mA? Even with these concerns understood, if the PCB layout and heat sink are not capable of dissipating 750mW of power, the LDO or the associated circuitry will be damaged.
I think only you can decide if this OK for you or not. Personally I wouldn’t draw that much current just because it is too close to the limits and the regulator obviously does not have big chunk-o-aluminum to get rid of the extra heat.
Would it work for a while? Sure. Will you have problems? Hard to know.
The problems can be subtle: lower life expectancy for the regulator, worse A-to-D performance, network problems with distant WiFi access points, etc. I just wouldn’t risk it over adding a $1 part.
What you suggest is exactly my point but without any guidance I have no way to make an informed decision. I am reasonably sure that a 10mA load would not be a factor and that 200mA is excessive, but I have no way of knowing where the current limit is. I don’t have a need for 200mA but I do for 50mA. Is that near the actual limit? I have no way of knowing. The hardware designers built the system to some requirement but for some reason it has not been made public. Yes it is only one more device for a couple of $'s but it is also (may be) redundant and therefor one more failure point.
The entire design is public and is available here:
I don’t think there is a spec for extra current margin in the regulator like you are asking for. I am sure they looked at the current requirements of the core and picked a regulator to supply that need plus a bit of margin, but I don’t think they have a spec for “a bit” or tested it to any particular value.
In theory you can draw the full extra 200mA but in practice I don’t think that would be a good engineering decision.
I am afraid that you are correct. It would appear that they decided to provide the voltage source but not to specify its limits. Thus rendering the output to the “it’s there but don’t use it” category. They were cleaver though and used the USB shield as part of the thermal plane for the voltage regulator. Too bad but that is the way it is, so time to move on.
I think this is a misunderstanding. The two 3.3 pins are not actually meant as voltage sources but rather are there as a byproduct. If not all the power provided by the regulator is actually used permanently by the Core itself, you can use it, but you have to assess if your program will put the Core in a state where it needs all the power (e.g. even sourcing 20mA on all 18 digital outputs + CC3000 will exceed 500mA).
