When I get my Photon, I’d like to use a supercap to keep the RTC synchronised in the face of power outages.
After some reading and some number crunching, I came up with this:
Edit: added D2 as per discussion. My calculations below still reflect the circuit without it.
(Updated schematic from post #41)
The super cap will be a 1.5F 5.5V cheapie from eBay.
The STM32F205 datasheet gives limits for VBAT operating voltage of Min 1.65V, Max 3.6V (p. 71) so that means the cap must be either charged at 3.3V or have a more complicated circuit to clamp the output to 3.6V.
Assuming I charge it at 3.3V, if I want to use a single 1W resistor to limit its charging current, that gives Max 303mA and Min 11Ω. Using a slightly larger 15Ω one, I get a charging time (5τ) of 2 minutes, which is ok.
If I use a Schottky diode, to avoid discharging the cap through the 3V3 rail, that should charge the capacitor to at least 3.1V, because at the end of the charging cycle, when the charging current is small enough, the diode drop should also be small (I can see a 0.2V / 0.1A point in the VF / IF curve in the diode’s datasheet.)
The STM32 datasheet gives a typical current consumption in VBAT mode (with backup SRAM, low-speed oscillator and RTC all enabled) of 1.68µA (p. 84.) C1’s voltage, after some time of constant current discharge, is V = V0 – I × t / C, so it should remain above 1.65V (the bottom limit for VBAT) for about 15 days. That’s neat!
The 100nF frankly I have no clue about, but I have seen it in every schematic on the topic. I suppose it’s there to provide a direct path for high frequency noise generated by the µC, so that it’s not forced through the cap. Why that is desirable I’m not sure.
Did I make any noobie mistakes?
Would you recommend a different circuit?