Migrating from Core to Photon with Standby Mode

Ok I am trying to figure out the pros and cons of VBAT and WKP in moving my design from the core to the photon.

In my current design I collect sensor data, transmit then enter DEEP_SLEEP (standby mode) for a long duration to save as much battery as possible. I wakeup either by the IWDG expiration that was set when entering sleep or via an external hardware reset to the RST pin and upon wakeup I have no memory of the past.

So I am looking at the STM32F205RGY6 Datasheet and trying to figure this out. Here’s 2 excerpts

3.18 Low-power modes

• Standby mode

The Standby mode is used to achieve the lowest power consumption. The internal
voltage regulator is switched off so that the entire 1.2 V domain is powered off. The
PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering
Standby mode, the SRAM and register contents are lost except for registers in the
backup domain and the backup SRAM when selected.
The device exits the Standby mode when an external reset (NRST pin), an IWDG reset,
a rising edge on the WKUP pin, or an RTC alarm / wakeup / tamper /time stamp event
occurs.

3.19 VBAT operation

The VBAT pin allows to power the device VBAT domain from an external battery or an
external supercapacitor.
VBAT operation is activated when VDD is not present.
The VBAT pin supplies the RTC, the backup registers and the backup SRAM.
Note: When the microcontroller is supplied from VBAT, external interrupts and RTC alarm/events
do not exit it from VBAT operation.

So If I move over to the WKP rather than External Reset via RST so that I can externally wake the device I get what advantage? Is it the the External Reset will wipe the backup registers and the WKP will not?

If I connect a button battery to VBAT does this stop WKP from being able to wake the device? Is the only advantage of a separate battery on VBAT is that the RTC still retains the time? The datasheet says that the backup registers can be preserved in Standby mode if selected.

Any help to clarify the functionality would be most appreciated.

@HardWater, VBAT and WKP play different roles. The VBAT pin is meant to keep the RTC running and to preserve backup registers and some (4KB) of SRAM when VDD drops. This comes in handy during power loss or when VDD is purposely dropped by an on/off circuit for example. The VDD (drop) event can trigger an interrupt so that the STM32 can react prior to a switch to VBAT. So, essentially, VBAT is a way to preserve key data while power is turned off.

The WKUP pin plays a role in the low power modes (stop, standby) of the STM32. Unlike STOP mode, the processor cannot be awakened using an external interrupt while in STANDBY mode. The only way to do this is using a rising edge on the WKUP pin. Remember that STANDBY mode provides the lowest power consumption short of dropping VDD.

On the Core, there is no access to the WKUP pin so the RTC, external or IWDG resets need to be used to exit the STANDBY mode.

The Photon will support a non-reset STOP mode, meaning the code will actually stop predictably until an external interrupt event wakes it. Because of the IDWG, the Core must force a reset to properly get into STOP mode. For a lower power state where your code can handle a RESET event, you will be able to use the WKUP pin to wake the Photon from STANDBY mode.

I hope this helps! :smile:

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@peekay123 Thanks so much for the reply.

Regarding VBAT you have confirmed my thinking about it use. It has a use but really does not do much for me in my application. I must say your words about the subject were much clearer than mine.

Also thanks regarding WKUP What was bothering me was the Datasheet says you cannot exit VBAT mode via an external interrupt. I kind of view the use of the WKUP pin as an external interrupt (thought I also can see that it may not be considered an external interrupt from ST’s perspective). Anyway for me it seems to be a non-issue as I probably will not make use of VBAT feature.

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So this is my understanding of this thread.
STANDBY is the lowest power consumption mode, and is achieved through the command Spark.sleep(SLEEP_MODE_DEEP, int seconds), where wakeup is achieved after seconds or WKP rising edge. SRAM and register values are lost in all cases.
STOP is low power mode, achieved through Spark.sleep(uint16_t, wakeUpPin, uint16_t edgeTriggerMode) where wakeUpPin can be any pin. On the Photon, SRAM and register values are maintained, but I’m not sure whether VBAT power is required for this.

Does this sound right to everyone?

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It appears to me that VBAT is basicly a UPS function. When the 5V is lost, it will stop the WIFY, stop the processing, but save the variables. Is that correct?
It is not used in low power modes other than when the 5V is lost?

Did you ever find out?

As fars as I know, VBAT currently only preserves realtime clock values. Everything else (variables) is lost.

There is API planned for Photon, which allows to designate several variables to be saved in memory protected by VBAT, so you will not lose values in those. This is still not ready, if I am not mistaken.

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