EEPROM read/write contention between Spark function, loop program?

My application reads and writes data into the EEPROM space above 0x8000. Both my main application and Spark functions do this, each calling the same exact read and write routines.

My question – how and when might a Spark function perform reads and writes versus when loop would do reads and writes? I am asking to understand if there is a chance that the Spark function will be reading from or writing to the EEPROM when my loop program is reading from or writing to EEPROM? I have had zero issues but want to be sure.

Below are the routines that do the work for both Spark function and the loop EEPROM reads/writes (this code was basically copied from long ago previous forum posts on using the EEPROM). Sorry it is plain text - don’t know how to put it into a code window for the forum.

// Function to read EEPROM above 0x80000
void readEE(int addr, int size)
{
NVIC_DisableIRQ(CC3000_WIFI_INT_EXTI_IRQn); // Prevent ARM/CC3000 interaction issue on SPI bus
NVIC_DisableIRQ(CC3000_SPI_RX_DMA_IRQn);
NVIC_DisableIRQ(CC3000_SPI_TX_DMA_IRQn);
delay(15);
sFLASH_ReadBuffer(readEEdata, addr, size); // Read bytes.
delay(15);
NVIC_EnableIRQ(CC3000_WIFI_INT_EXTI_IRQn); // Turn interrupts back on
NVIC_EnableIRQ(CC3000_SPI_RX_DMA_IRQn);
NVIC_EnableIRQ(CC3000_SPI_TX_DMA_IRQn);
}

// Function to write EEPROM above 0x80000
void writeEE(int addr, int size)
{
NVIC_DisableIRQ(CC3000_WIFI_INT_EXTI_IRQn); // Prevent ARM/CC3000 interaction issue on SPI bus
NVIC_DisableIRQ(CC3000_SPI_RX_DMA_IRQn);
NVIC_DisableIRQ(CC3000_SPI_TX_DMA_IRQn);
delay(15);
sFLASH_EraseSector(addr); // Erase sector.
delay(15);
sFLASH_WriteBuffer(writeEEdata, addr, size); // Write new data.
delay(15);
NVIC_EnableIRQ(CC3000_WIFI_INT_EXTI_IRQn); // Turn interrupts back on
NVIC_EnableIRQ(CC3000_SPI_RX_DMA_IRQn);
NVIC_EnableIRQ(CC3000_SPI_TX_DMA_IRQn);
delay(15);
}

As long as you read/write to flash on the main loop, then there is no chance of any contention between user and system code, and no need to enable/disable interrupts.

Internally, the point of contention is the SPI bus (internal SPI bus) that connects the external flash and the CC3000. This is accessed concurrently, and is protected by a mutual exclusion lock.

Awesome - thanks for quick reply.