I2C Slave mode Clock stretching intermittant failure

AFAIK the slave is never in the position to start a request - the slave is expected to stay silent until asked by the master.
The master either initiates a write to the slave or requests a response from it but never the other way round.

The fact that the slave sends its address can be understood as a way for the slave to seek attention of the master who in turn may or may not allow the slave to speak by actively asking.

The initial write of the master allows the salve to speak and at the same time denies the other slaves access to the bus. It also allows the master to select the register of interest from the slave he's speaking to.