In order to pull together these threads, I’d like to summarize what has been established during these discussions
Current Core behaviour:
- When the Core starts up, all the D pins are actively pulled low by the Core, till instructed otherwise in
setup(), which - in
SYSTEM_MODE(AUTOMATIC)- only runs after the cloud connection is established (class constructors might run - in undefined order - before that).
- While flashing the Core, this doesn’t seem to be the case, but the JTAG pins do get internal pull resistors attached (see quote) which is especially noticable on D7 (blue on-board LED).
The expected and surely preferable way to treat all pins would be, to have them high impedance input and without any pull resistors from start till user code - and only user code - alters the pin mode.
As for JTAG pins, that might not be possible, but if it can’t be helped, it needs clear documenting, in order to prevent users from attaching external circuitry, that couldn’t cope with this default behaviour.
On the Spark Core, the A pins and pins RX & TX don’t seem to suffer such issues.
For the Spark Photon and Spark Electron tests might be in order.
… to be continued